It can be appreciated that placing mechanical stresses or strain (e.g., tension or compression) upon a semiconductor substrate can affect the performance of devices formed in and/or on the substrate. With regard to MOS transistors, for example, stressing the substrate can change charge mobility characteristics in respective channel regions of the transistors. This may be beneficial because, for a given electric field developed across the transistors, the amount of current that flows through the channel regions is directly proportional to the mobility of carriers in the channel regions. Thus, the higher the mobility of the carriers in the channel regions, the more rapidly the carriers will pass through the channel regions and the faster the transistors can perform. Improving the mobility of the carriers in the channel regions can also lower operating voltages, which may be desirable at times.
One drawback to improving channel mobility via strain is that compressive strain, which generally improves hole mobility for silicon substrate devices, can degrade electron mobility, and that tensile strain, which improves electron mobility for silicon substrate based devices, can degrade hole mobility. As a result, introducing tensile strain can improve performance of NMOS devices but degrade performance of PMOS devices. Similarly, introducing compressive strain can improve performance of PMOS devices but degrade performance of NMOS devices. Additionally, the impact of stress on NMOS and PMOS transistor mobility depends upon the channel orientation and surface orientation and is different for different orientations.